1. Field of the Invention
This invention relates to computer systems and, more particularly, to methods and apparatus for extending computer architecture from thirty-two to sixty-four bits.
2. History of the Prior Art
As computers have improved in speed and ability, there has been a constant demand for more addressable memory. The size of the address directly controls the size of memory which may be addressed. Each additional bit in an address doubles the amount of addressable memory. Thus, a system using sixty-four bit addresses provides two to the thirty-second power more addresses than does a system using thirty-two bit addresses. Consequently, researchers are today attempting to develop computer systems based on sixty-four bit architectures. On the other hand, very powerful computers exist today which use thirty-two bit addresses. A very large amount of very effective software exists for such systems. Most companies have more invested in their computer software than they do in their hardware. These thirty-two bit systems could effectively handle larger and larger problems if there were an easy way to simply address more memory. Presuming that the only effective way to obtain more memory is to design systems using larger (sixty-four bit) addresses, it would be very foolish and economically disastrous to simply discard all of the effort presently invested in the design of thirty-two bit systems and their software. For this reason, it is an a priori requirement that any new computer system based on a new memory size must be able to use the old programs on the new architecture. A primary question in the design of such a system is, therefore, how to change memory address size and still be able to use the old programs on the new architecture.
Two different tacks have been taken in resolving this problem so that a new system can run both old and new programs. One way to do this is to essentially provide two different architectures within the same machine for handling programs based on the different memory sizes and give the machine the ability to select one or the other architecture. This allows a machine to implement two different instruction sets. This is generally referred to as mode selection. One problem with this solution is that the need for two independent architectures must be perpetuated with each new series of machines; the manufacturer must continue to build systems including both thirty-two and sixty-four bit architectures for so long as the thirty-two bit programs are to be used. Another problem with this solution is that old and new procedures cannot communicate easily since they operate on different portions of the system. Digital Equipment Company (DEC) attempted this type of solution in changing from its PDP11 series of computers to its VAX series of computers. DEC set up microcode for operating both the PDP11 and the VAX instruction sets in its new VAX computers and used a mode switch which allowed selection between the two instruction sets in the machine.
A second solution to the problem is to design the new system so that the same hardware is able to handle both old and new processes using the same circuitry. This is a much more desirable solution. However, the prior art attempts to reach this solution have not, in fact, accomplished their purpose of eliminating hardware directed specifically to the different architectures. For example, Intel has followed this path in designing and improving its 80.times.86 line of computers. In general, Intel has continued the memory-handling hardware mechanisms for programs based on the old architecture and has added additional memory-handling hardware for programs based on the new architecture. The commands available to the old programs are essentially a subset of the entire set of commands available in the new machine. Although this solution allows the use of both old and new software by the same processor, it has provided no easy way to utilize old and new processes together. This method has also required the inclusion of the additional memory-handling hardware with each more advanced step, often to the detriment of the more advanced architecture. For example, the advanced Intel processors are still unable to deal with the larger address space except through the use of memory mapping hardware provided in the older machines.
Thus, there have been at least two different solutions to the problem. Each solution has not resolved the problem in a manner in which the new system is simply able to run either old or new programs using the new address space apparently without any great amount of new hardware except that necessary to allow the larger addresses to be utilized and without any rewriting of old software to fit the new hardware.
One especially difficult problem associated with providing such a system is caused by the manner in which an older system maintains its register files and stores the contents of those registers to memory and restores those contents during certain operations. Since a new system using a memory address size twice as large as an old system must necessarily use different space than the old system to store this information, some way must be found to allow the system to handle information for programs of both sizes correctly.